1. Field of the Invention
Embodiments of the present invention generally relate to a hardware emulator and, more specifically, a hardware emulator having variable input primitives.
2. Description of the Related Art
Hardware emulators are programmable devices used in the verification of hardware designs. A common method of hardware design verification uses processor-based hardware emulators to emulate the design. These processor-based emulators sequentially evaluate combinatorial logic levels, starting at the inputs and proceeding to the outputs. Each pass through the entire set of logic levels is known as a cycle; the evaluation of each individual logic level is known as an emulation step.
A hardware emulator generally comprises a computer workstation for providing emulation support facilities, i.e., emulation software, a compiler, and a graphical user interface to allow a person to program the emulator, and an emulation engine for performing the emulation. The emulation engine is comprised of at least one emulation board, and each emulation board contains individual emulation circuits. Each individual emulation circuit contains multiple emulation processors, and each emulation processor is capable of mimicking a logic gate. Thus, the hierarchy of the emulation engine is an emulation board, multiple emulation integrated circuits, and multiple processors that are part of each emulation integrated circuit.
Each processor is connected to a data array. The data array is a special memory that has multiple read ports and supplies input data to the processor via each read port. The processor evaluates the data supplied from the data array in accordance with an instruction word supplied from an instruction memory. The computational efficiency of the hardware emulator is governed by the amount of data a processor can evaluate in a single emulation step. The processor does not always evaluate all of the input data from all of the read ports of the data array. For example, if a data array has four read ports, and a processor is evaluating a function that requires two operands, input data supplied from two out of the four read ports of the data array will be unused by the processor.
The computational efficiency of the hardware emulator can be increased if a greater amount of data supplied from the data array is evaluated in a single emulation step. Further efficiencies can be achieved if a variable amount of data could be processed.
Thus, there is a need in the art for a method and apparatus that enables a hardware emulator to evaluate a variable amount of data in a single emulation step.